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In this lecture, we will talk about Task state segment, TSS and enable interrupts in user mode. 

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When we are running in ring3, an interrupt is fired

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the control will be transferred to the interrupt handler which runs in ring0 in our system. 

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Remember the DPL of the segment descriptor which the interrupt handler is at is set to 0. 

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In this process, the ss segment register is also loaded with null descriptor by the processor.  

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and rsp register is also loaded with a new value.

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The value of RSP is stored in the TSS. 

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Therefore, what we need to do is set up the TSS and specify the new value of RSP in the TSS. 

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as you see, this is a structure of tss.

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The field of RSP0 is what we want.  

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When the control transferred from low privilege level to ring0, the value of RSP0 is loaded into RSP register. 

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Since we don’t use ring1 and ring2, we are not gonna set those fields. The interrupt stack table, 

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as we saw in the interrupt descriptor,

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if the IST field in the interrupt descriptor is non-zero, then it is the index of IST here.  

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For example, if it is 1, then the value of IST1 is loaded in RSP instead of RSP0 value. 

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.

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Since we have set the interrupt descriptors with IST field being 0, we are not gonna use the IST fields here. 

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.

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The last item is the address of io permission bitmap which is used for protection for io port addresses. 

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It is not used in our system. 

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The TSS descriptor is stored in the GDT. Unlike the code segment and data segment descriptors where the base and limit are ignored, 

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the base and limit attributes in TSS descriptor are used. 

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So when we set up the descriptor, the base address and limit need to be set correctly. 

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the value 0,1,0,0,1 means that this is the 64-bit TSS descriptor. 

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The meaning of P and DPL is the same as in the code and data segment descriptors. 

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The G and available bit are not used in our system, so this part of the attribute will be set to 0.  

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In the upper part of the descriptor, we have 5 0s, 

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and the part in grey means it is reserved. 

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Right now, we have seen the tss descriptor.

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we also need a selector to reference the descriptor. 

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Loading the TSS selector is different from loading the code segment selector. 

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Here we load the selector using instruction load task register.   

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After the selector is loaded,  the processor then uses the selector to  

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locate the TSS descriptor in the GDT. 

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Let’s see how to implement it in the project. 

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The first thing I’m gonna do is define the Task state segment structure.  

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We call it TSS. 

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As we saw in the slide, the first four bytes are reserved, 

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so we assign 0 to it.  

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The next field is RSP0, 

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this is the field we need to set with the new address of RSP.  

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Here we want the RSP loaded with 

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150000 when the interrupt handler is called. Other fields are not used in the system, we simply set them to 0.

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.

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So we use directive times. 

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The last field is the address of IO permission bitmap. We assign the size of TSS to it 

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which means IO permission bitmap is not used.

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Ok, we define the length of the TSS. 

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Once the Task state segment is defined, what we are gonna do next is define the TSS descriptor. 

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.

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In the GDT, we add a new entry called tss descriptor 

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so that we can see it easily. 

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If you don’t want the label tss descriptor, you can simply remove it. 

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The first two bytes are the lower 16 bits of tss limit. 

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We set it to the length of TSS minus 1. 

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The base address of TSS is set to 0 for the moment, 

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we will assign the address in the code. 

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So we set the next 3 bytes to 0s 

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which is the lower 24 bits of the base address. The next byte is attribute field. We assign the value.

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.

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89

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In the binary format, you can see the present bit is 1, DPL is 0, 

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and then 0,1,0,0,1 specifies this is the 64-bit TSS. 

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As for other fields, simply set them to zero.

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OK, we are done.  At the start of the code, 

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we will load the TSS descriptor. 

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First, we need to copy the address of TSS to the descriptor, 

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We move rax, tss. 

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The lower 16 bits of the address is in the third bytes of the tss descriptor. 

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We move 

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tss descriptor plus 2 and ax. 

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Bit 16 to 23 of the address is in the fifth bytes of the descriptor. 

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We shift right 

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the value in rax by 16 bits.

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Bit 16 to 23 of the address is now in register al and then move tss descriptor 

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plus 4 and al.  

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Then we continue to shift right rax 

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8 bits. 

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The next part of the base address is in the 8th byte of the descriptor, 

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so we move 

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tss descriptor plus 7 and al. 

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The upper 32bits of the address is in the next location.  We shift rax 8bits. 

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Eax holds the upper 32bits of the address now and we move 

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tss descriptor plus 8, 

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,

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OK.

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the tss descriptor is set at this point.  

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We can load the selector using load task register instruction. The selector we use is 20 in hexadecimal, 

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since the descriptor is the fifth entry in the GDT.

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we move ax, 20 and load task register,

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ax.  

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All right.

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setting up the tss is finally done. 

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Before we test it out, we need to enable the interrupt. When we get from ring0 to ring3, 

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,

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the interrupt flag is cleared, bit 9 of rflags is the interrupt flag. 

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So instead of pushing the value 2, 

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we push 202, indicating that the interrupt is enabled. Once we return to user entry, 

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the value will be loaded in rflags and the interrupt is enabled. 

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Remember the timer is configured and working now. 

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Once the timer interrupt is fired, the execution is interrupted 

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and the processor responds to the interrupt, we will see the timer handler is called 

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if everything goes as expected. 

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So we save the file,

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and build a project.

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OK.

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As you can see we have 3 characters K, U, and T. So the character T is what we expect.

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the TSS is working.